The semiconductor device passivated in accordance with this invention includes a semiconductor junction, e.g. a p-n or p-i-n junction, a region of a first conductivity type and a region of a second conductivity type formed therein or thereover. The semiconductor junction formed between these regions typically extends to one or more surfaces of the device. The junction periphery, i.e. the area where the semiconductor junction intersects the surface, in known devices of this type is typically characterized by edge breakdown and multiplication of surface currents which substantially increase the dark current, i.e. the reverse bias leakage current, which flows with no light incident on the device. This has the adverse effect of providing a less sensitive photodetector.
The incidence of edge breakdown and surface currents has been reduced by fabricating photodetectors such that the second region is a well-like area within the first region. This can be done, for example, by depositing a mask over the top surface of the first region and diffusing a dopant of the opposite conductivity type through an opening therein. This provides a junction which extends to the top surface of the first region under the mask. Preferably, the diffusion mask should also serve as a protective passivating layer since it covers the device surface at the semiconductor junction periphery. A copending application entitled, "SILICON OXYNITRIDE PASSIVATED SEMICONDUCTOR BODY AND METHOD OF MAKING SAME", U.S. Pat. Ser. No. 819,296, filed Jan. 16, 1986, discloses a class of silicon oxynitride compounds suitable for this purpose.
A problem of many semiconductor devices is that exposure of the surface to the atmosphere prior to deposition of the passivating layer can adversely affect device performance characteristics. For example, photodetectors, even when passivated with the above-described silicon oxynitride material, may have high dark current due to previous exposure of the device surface to the ambient.
Therefore, a method of treating and modifying the surface of a semiconductor device, which method is compatible with passivating layer deposition methods has been sought.